1. Field of the Invention
The present invention relates to a semiconductor device and a production method thereof. More particularly, the present invention relates to a semiconductor device having a capacitance element (capacitor) using a ferroelectric film as a dielectric film and a production method thereof.
2. Description of the Related Art
Attempts have been made to form a capacitance element by using a ferroelectric film as a dielectric film in order to achieve higher operation speed and a higher integration density of a DRAM (Dynamic Random Access Memory). The following methods are known for forming such a capacitance element on a semiconductor substrate.
(1) A lower electrode and an insulating body are serially formed on a semiconductor substrate. After a hole is formed in the insulating body, a paste-like ferroelectric body is buried into the insulating body in such a manner that one of the ends thereof comes into contact with the lower electrode. Thereafter, an upper electrode is formed on the insulating body in such a manner as to come into contact with the other end of the ferroelectric body (refer to JP-A-2-116195). PA0 (2) An inter-level insulating film and a diffusion barrier layer are serially formed on a semiconductor substrate. A well-like ditch is defined in the diffusion barrier layer, and a lower electrode is buried into this ditch. The diffusion barrier layer and the lower electrode are then etched or polished until the diffusion barrier layer and the lower electrode are flattened. A ferroelectric thin film is formed on the diffusion barrier layer and the lower electrode so flattened. Thereafter, an upper electrode is formed on the ferroelectric thin film (refer to JP-A-7-169854).
When a ferroelectric substance made of a dielectric material such as SrTiO.sub.3, BaTiO.sub.3 or (Ba, Sr)TiO.sub.3 (titanate film containing Ba and Sr) is used in order to reduce the area of the capacitance element without lowering its capacitance value, however, it is extremely difficult to apply dry etching to such a ferroelectric substance because it is impossible to form a plasma gas forming a volatile reaction product which vaporizes Ba or Sr. As a result, it is extremely difficult according to the method (1) to conduct fine machining so as to bury the ferroelectric substance made of the dielectric material such as SrTiO.sub.3, BaTiO.sub.3 or (Ba, Sr)TiO.sub.3 into the insulating body. Though the ferroelectric substance made of the dielectric material such as SrTiO.sub.3, BaTiO.sub.3 or (Ba, Sr)TiO.sub.3 can be wet etched, fine etching is difficult because wet etching is anisotropic etching.
The method (2) uses a perovskite type oxide ferroelectric thin film such as a PZT thin film as the ferroelectric thin film and SiO.sub.2 as the inter-level insulating film. Therefore, a diffusion barrier layer is necessary to prevent mutual diffusion of Pb and Si between the ferroelectric thin film and the inter-level insulating film, so that fine etching is difficult to practice.
As another method of burying the ferroelectric substance made of a dielectric material such as BaTiO.sub.3 into the ditch of the substrate, JP-A-3-103085 discloses a method of manufacturing a dielectric moving member in a power generator utilizing electrostatic force in the technical field different from that of a production method of semiconductor devices. According to this method, a ferroelectric film such as BaTiO.sub.3 is formed on a substrate having ditches in such a manner so as to bury the ditches, and the surface of the ferroelectric film is polished by lapping, polishing, etching, etc, to leave the ferroelectric film only inside the ditches. However, this reference does not mention the use of a chemical-mechanical polishing method as the polishing method of the ferroelectric substance made of a dielectric material such as BaTiO.sub.3.
An example of the use of the chemical-mechanical polishing method in production methods of semiconductor devices is described in U.S. Pat. No. 4,944,836. According to this reference, an insulating layer having ditches is formed on a semiconductor substrate, a metallic layer is then formed in such a manner as to bury the ditches, and the surfaces of the metallic layer and the insulating layer are then polished by the chemical-mechanical polishing method to leave the metallic layer only inside the ditches of the insulating layer. However, as transistor devices, are also formed on the semiconductor substrate in semiconductor memory devices underlying-steps are produced under the ferroelectric film. Therefore, the underlying steps exist when the ferroelectric film is polished by the chemical-mechanical polishing method, the ferroelectric film cannot be correctly buried into the ditches. However, JP-A-3-103085 and U.S. Pat. No. 4,944,836 do not teach how to solve this problem.